By Liza Fireman, Erez Petrank, Ayal Zaks (auth.), Shriram Krishnamurthi, Martin Odersky (eds.)
This publication constitutes the refereed complaints of the sixteenth foreign convention on Compiler building, CC 2007, held in Braga, Portugal, in March 2007 as a part of ETAPS 2007, the ecu Joint meetings on conception and perform of Software.
The 15 revised complete papers offered have been conscientiously reviewed and chosen from 60 submissions. The papers are geared up in topical sections on structure, rubbish assortment and software research, sign up allocation, and software analysis.
Read or Download Compiler Construction: 16th International Conference, CC 2007, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2007, Braga, Portugal, March 26-30, 2007. Proceedings PDF
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Additional info for Compiler Construction: 16th International Conference, CC 2007, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2007, Braga, Portugal, March 26-30, 2007. Proceedings
Earlier approaches [6,7] either model the array allocation problem as a maximum weight path cover problem or use a set of heuristics and certain subgroup ordering. As will be observed in Section 3, neither of these approaches is akin to the array allocation problem and results in inferior solution. We model this problem as a graph partitioning problem which is a natural way of formulating the array allocation problem. The arrays in a single partition are allocated to a single memory bank. During this partitioning process, we try to minimize the sum of the weights of the edges that are being cut.
Power-Down Cycle Comparisons for a 8MB Memory Bank 42 K. Shyam and R. Govindarajan evaluate our schemes under a more realistic on-demand activation scheme later in this section. In Figure 3 we plot the energy consumption of the memory subsystem, for all the benchmarks under various allocation schemes normalized to the NoAllocation scheme, which is treated as the base case. We observe that the the MWPC scheme achieves an energy reduction of 8% to 12% in various benchmarks programs. Whereas, HGPS and ILPS achieve a reduction of 18% to 20% in comparison to the No-Allocation scheme.
1/0 1/1 : AAU instruction m. : ALU instruction 0/1 6 5 1/0 1/0 7 i/j True Data Dependence, where i represents latency and j represents loop iteration difference i/j Anti Data Dependence i/j Ouput Data Dependence 1/0 8 1/0 9 ALU instruction (b) An assembly code of figure (a) (c) A data dependence graph of figure (b) Fig. 2. C Code fragment from half-rate GSM and corresponding loop body in SC140 For analysis, consider the two loop-carried data dependences in Figure 2(c). First, the dependence from the 9th back to the 2nd instructions is anti since d10 value claimed from the 9th instruction is generated by the 2nd instruction.